If we get AGI before 2030 but can only produce ~200 GW a year of chips on advanced process nodes, can we ease the bottleneck by going back to older nodes? Some of the most singularity-pilled investors think so. Most of the FLOPS improvement between chip generations has come from numerics - not transistor density. But you could just design a new version of a 7nm chip like the A100 to have FP4. Holding numerics and die area constant, a B200 (2025 chip on 4nm) would only have ~3.5x more FLOPS…